The present invention relates to a semiconductor device. More specifically, the present invention relates to a semiconductor device that receives an external power supply voltage from the outside and supplies the external power supply voltage to an internal circuit through, for example, an internally disposed power supply wiring network.
In recent years, it is demanded that a semiconductor device and an electronic system in which a semiconductor device is mounted be highly reliable. If, for example, solder used to mount a semiconductor device on a substrate is defective, the semiconductor device may not properly operate. Therefore, such an electronic system is configured so that a power supply voltage generated by a single power supply is supplied to the semiconductor device through a plurality of terminals of the semiconductor device. This ensures that the semiconductor device operates even when some of the terminals become defective. However, when some of the terminals become defective, different power supply voltages are supplied to the internal elements of the semiconductor device. Therefore, if some of the terminals become defective in a situation where the terminals are used to supply power supply voltage to the semiconductor device, the semiconductor device may malfunction. As such being the case, technologies for detecting the abnormality of a power supply voltage supplied to a semiconductor device are disclosed in Japanese Unexamined Patent Publications No. Hei 09 (1997)-138757, No. 2008-311767, and No. 2006-119777.
The related-art technology disclosed in Japanese Unexamined Patent Publication No. Hei 09 (1997)-138757 selects one of a plurality of subsystems on a periodic basis to let the selected subsystem conduct a boundary-scan test instead of a normal process performed by the selected subsystem while operating the subsystems. Further, this related-art technology checks the operating states of the other subsystems and peripheral circuits in order to identify failures in the subsystems and peripheral circuits.
The related-art technologies disclosed in Japanese Unexamined Patent Publications No. 2008-311767 and No. 2006-119777 control the operating states of circuits in each power supply block by checking each power supply block to detect a decrease in a power supply voltage.